Chip Insights

Chip Insights

Home
Notes
Industry Perspectives
Computer Architecture
EDA and Software
Career Resources
Subscriber Letters
Context Caching (Video)
Archive
About

EDA and Software

The Accidental Comeback of Verilog
How Generative AI is ending the HDL vs HLS debate
Jan 17 • Bharath Suresh
The era of full-stack chip designers
What are chip design teams going to look like in the future?
Jul 6, 2025 • Bharath Suresh
Evolution of HDLs - Part 2: Keeping up with Moore's Law
How VHDL and Verilog evolved into to their current form
May 31, 2025 • Bharath Suresh
Evolution of HDLs - Part 1: The birth of VHDL and Verilog
A story of research, innovation, and collaboration
Mar 8, 2025 • Bharath Suresh
EDA Deep Dive - Part 3: The AI Era
Who can provide the ChatGPT moment for semiconductors?
Jan 11, 2025 • Bharath Suresh
EDA Deep Dive - Part 2: Open Source
Is free EDA too good to be true?
Dec 7, 2024 • Bharath Suresh
EDA Deep Dive - Part 1: The History
Breakthroughs, Mergers, and so much more
Nov 16, 2024 • Bharath Suresh
© 2026 Bharath Suresh · Privacy ∙ Terms ∙ Collection notice
Start your SubstackGet the app
Substack is the home for great culture